1. Field of the Invention
The present invention relates to a semiconductor wafer on which semiconductor devices to be screened are formed. The present invention relates to a burn-in apparatus for screening semiconductor devices formed on a semiconductor wafer. The present invention relates, more particularly to a burn-in apparatus and a semiconductor wafer which enables screening many semiconductor devices at once without connection failures on wires.
2. Description of the Related Art
Burn-in screening has been known as a technique for eliminating semiconductor devices having potential failures. The screening is usually performed under elevated temperatures, and the devices being screened have been electrically stressed for a predetermined time period. Thus screened device tends to induce accelerated failures which may appear early in the device""s lifetime.
Conventional screening has been applied to devices which are cut from the wafer and mounted into packages. Usually, the devices are placed in the packages and then the packages go into sockets on the burn-in boards. And then, the boards are placed in the burn-in apparatus for screening.
Recently, demands for screening unpackaged devices have been developing because the unpackaged devices have been widely used. However, it is difficult to individually screen devices which have been cut away from the wafer. Therefore, demands for wafer level burn-in have been developing.
Such the wafer level burn-in techniques are disclosed in Unexamined Japanese Patent Application KOKAI Publications Nos. S63-124443, H5-121502, H6-5677, and H10-284556. The disclosures of the above applications are incorporated herein by reference in their entirety.
In each of the techniques disclosed in the above applications, common conductive X-axis and Y-axis pathways for screening are formed among a plurality of devices formed on a wafer, and common terminals connected to the common pathways are formed at wafer edges. More precisely, common pathways 111 are formed among semiconductor devices, and common terminals 112 are formed at wafer edge, as shown in FIG. 6A. During the screening process, the wafer is stuck to a stage 113 in the burn-in apparatus as shown in FIG. 6B. And then, a probe 114 contacts the common terminals 112, as described in Unexamined Japanese Patent Application KOKAI Publication No. H5-121502. Then, voltages, test pattern signals, and the like necessary for screening are supplied to the semiconductor devices from a power source 115 and a pulse generator 116 via the probe 114, the common terminals 112 and the common pathways 111. Thus, the semiconductor devices on the wafer are screened.
FIG. 7 is a diagram for explaining the screening process disclosed in Unexamined Japanese Patent Application KOKAI Publication No. H10-284556. A semiconductor wafer 122 on which semiconductor devices are formed is mounted on a stage 121 in a burn-in apparatus, as a first step. Then, a contact sheet 123 is placed on the wafer 122, and a base unit 124 is placed on the contact sheet 123. One major surface of the contact sheet 123 facing the wafer 122 has terminals which has a pattern same as that of terminals on the semiconductor devices. The other side of the contact sheet 123 has terminals which has a pattern same as that of terminals formed on a surface of the base unit 124 which facing the contact sheet 123. During the screening process, a mechanical jig 125 is pressed upon the burn-in apparatus, thus, the contact sheet 123 and the base unit 124 are pressed upon the wafer 122. This contact establishes electrical connection between the terminals on the base unit 124 and the terminals on the semiconductor devices while sandwiching the contact sheet 123 therebetween. A signal generator 126 generates a test pattern signal, and supply it to the semiconductor devices via the base unit 124 being connected to the signal generator 126 and via the contact sheet 123. Thus, the semiconductor devices are screened.
According to the techniques disclosed in the above mentioned Unexamined Japanese Patent Application KOKAI Publications Nos. S63-124443, H5-121502, and H6-5677, the x-axis and y-axis common pathways 111 are formed among the semiconductor devices. Because such wiring formation is very complex, the formation process is also complex. Moreover, the above-described techniques require many steps before carrying out the screening such as formation of the common terminal 112 and the like. Therefore, it takes a long time before carrying out the screening. Such the extra steps also raise the manufacturing cost.
According to the technique disclosed in Unexamined Japanese Patent Application KOKAI Publication No. H5-121502, voltages and signals necessary for the screening are supplied to the semiconductor devices via the probe 114 which contacts the common terminals 112 on the wafer. Elevated temperature in the burn-in apparatus may expand the probe 114 itself, and then the probe 114 may fail to precisely contact the common terminals 112. That is, the technique disclosed in the above application has a problem which causes unsuccessful screening. Moreover, the stage 113 can hold only one wafer. Therefore, screening efficiency is poor, especially in a case where the wafer must be placed in a chamber under a constant temperature for a long time.
In the case of Unexamined Japanese Patent Application KOKAI Publication No. H10-284556, the base unit 124 and the contract sheet 123 are pressed upon the semiconductor wafer 122 by the mechanical jig 125. This structure permits the burn-in apparatus to place only one wafer therein for each screening. This technique also has poor efficiency.
The present invention has been made in consideration of the above. It is an object of the present invention to provide a burn-in apparatus and a semiconductor wafer for screening semiconductor devices efficiently. It is another object of the present invention to provide a burn-in apparatus and a semiconductor wafer for screening semiconductor devices successfully. A further object of the present invention is to provide a burn-in apparatus and a semiconductor wafer for screening multiple semiconductor devices simultaneously without connection failures on wires prepared for the screening.
To achieve the above objects, a burn-in apparatus according to a first aspect of the present invention is a burn-in apparatus comprising:
a holder which holds a plurality of semiconductor wafers each having an inner zone prepared for arranging thereon a plurality of semiconductor devices to be screened, and a peripheral edge zone around the inner zone, in order to install the plurality of the semiconductor wafers in a room;
a thermal controller which controls temperature of the room so as to heat the plurality of the semiconductor wafers up to a predetermined temperature;
a signal generator which generates a test pattern signal for screening the semiconductor devices on the plurality of the semiconductor wafers which have been heated up to the predetermined temperature; and
interconnection members which electrically interconnect the signal generator and each of the semiconductor devices, in order to provide the semiconductor devices respectively with the signals generated by the signal generator.
This invention realizes screening the semiconductor devices formed on the plurality of semiconductor wafers installed in the room. In other words, it realize efficient screening wherein many semiconductor devices are screened.
The holder may hold the semiconductor wafers each having a plurality of pathways which are formed across the inner and peripheral edge zones for supplying the test pattern signals to the semiconductor devices; and
each of the interconnection members may have a plurality of electrodes being connected to the signal generator, and presses the electrodes so as to contact the pathways.
Each of the interconnection members may comprise;
a first board on which the semiconductor wafer is vacuum fixed; and
a second board which collaborates with the first plate to provide the electrodes with pressure for making contact with the pathways.
The plurality of the electrodes may be arranged so as to contact both ends of the pathways which are formed among lines of the matrix formed semiconductor devices on the semiconductor wafer.
The plurality of the electrodes may be grouped by ends of the pathways being connected to, and the electrodes in the same group may be connected to each other by wires while one of the electrodes in the group is connected to the signal generator.
A semiconductor wafer according to a second aspect of the present invention is a semiconductor wafer comprising:
a device zone which is prepared for forming thereon semiconductor devices, and a peripheral zone which is prepared around the device zone;
a plurality of semiconductor devices which are formed on the device zone to be subjected to screening; and
a plurality of wires which are formed across the device and peripheral zones in order to supply signals for screening respectively to the plurality of the semiconductor devices, wherein the wires are straight while being parallel to each other in the device zone.
The wires may extend straightly from the device zone to the peripheral zone.
The wires may be formed so that intervals among the ends of the wires on the peripheral zone are wider than intervals among the wires on the device zone.